New
Lead the discipline of RFIC/layout on mixed-signal ICs for space systems. Collaborate with cross-disciplinary teams (ASIC, firmware, packaging). Work on full-chip layout of analog and RFIC blocks with matching focus. Develop floor plans, P/G distribution, and pad locations with packaging. B.S. in electrical or computer engineering, or 3+ years IC layout. 1+ years IC layout experience with degree. Strong analog layout skills. Advanced node experience: 22nm/16nm/7nm/5nm or below. RF block layout: LNA, VCO, mixers. Scripting with Python/Perl; Linux knowledge. Medical, vision, and dental coverage. 401(k) retirement plan. Stock options and long-term incentives. Paid vacation, holidays, and sick leave. Parental leave. Discounts and other employee perks.